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NR8576 series seiko npc corporatoin? real-time clock modules overview the NR8576 series devices are serial-interface type real-time clock module ics with built-in crystal oscillator elements. they feature timer counter circuits that keep track of time from the current second to the current year, automatic leap-year adjustment, and a supply voltage detect function. also, a 32.768khz/1hz select out- put function is incorporated for independent hardware control. they are available in compact 14-pin sops (NR8576a ) and miniature 18-pin sops (NR8576b ). features crystal oscillator element built-in for adjustment- free use timer counters for second, minute, hour, day, day of the week, month, and year 2.5 to 5.5v operating voltage range 1.7 ?0.3v supply voltage detection threshold 1.0? at 3.0v (typ) current consumption automatic leap-year calendar adjustment 32.768khz and 1hz output selectable package 14-pin sop (NR8576a ) 18-pin sop (NR8576b ) pinouts 14-pin sop 18-pin sop package dimensions (unit: mm) 14-pin sop 18-pin sop series configuration 1 ce 2 nc 3 vss 4 nc 5 nc 6 fout 7 10 9 8 14 13 12 11 fsel wr foe nc nc vdd clk data 1 ce 2 nc 3 vss 4 nc 5 nc 6 fout 7 16 17 18 12 13 14 15 fsel wr foe nc nc vdd clk data 811 nc nc nc nc 10 9 1.27 3.2 0.1 0.10 0.05 5.0 010 0.35 0.1 0.15 10.1 0.2 0.6 0.2 7.4 0.2 1.27 1.8 0.1 0.05 0.05 5.4 7.8 0.2 010 0.4 0.1 0.15 11.4 0.2 0.6 0.2 device package frequency deviation NR8576aa 14-pin sop 5 ?12 ppm NR8576ab 14-pin sop 5 ?23 ppm NR8576ba 18-pin sop 5 ?12 ppm NR8576bb 18-pin sop 5 ?23 ppm
NR8576 series seiko npc corporatoin? block diagram pin description name i/o description vss ground connect a 0.1? capacitor between vdd and vss. ce i chip enable. high: enable low: data goes high impedance; input on wr, clk, and data stops; and the tm bit is cleared. fsel i fout output frequency select. high: 1hz low: 32.768khz wr i data input/output control switch. high: data input mode (rtc write) low: data output mode (rtc read) foe i fout output enable control. high: the frequency selected by fsel is output on fout. low: fout goes high impedance. vdd supply voltage. connect a 0.1? capacitor between vdd and vss. clk i system clock input. data is input (rtc write mode) and output (rtc read mode) on the rising edge of clk. data i/o data read and write input/output fout o frequency output (output controlled by foe and frequency selected by fsel). in 1hz output mode, the 1hz signal is synchronized to the internal 1 second signal. fout output is not affected by the ce signal. nc no connection. leave open for normal use. osc divider timer counter shift register voltage detect i/o controller control circuit vdd vss data clk ce output controller fout wr fsel foe 32.768khz
NR8576 series seiko npc corporatoin? specifications absolute maximum ratings v ss = 0v unless otherwise noted. recommended operating conditions v ss = 0v unless otherwise noted. oscillator characteristics v ss = 0v unless otherwise noted. parameter symbol condition rating unit supply voltage range v dd ta = 25 c ? 0.3 to 7.0 v input voltage range v in ta = 25 cv ss ? 0.3 to v dd + 0.3 v output voltage range v out ta = 25 cv ss ? 0.3 to v dd + 0.3 v storage temperature range t stg ? 55 to 125 c parameter symbol condition rating unit supply voltage range v dd 2.5 to 5.5 v clock supply voltage range v clk 1.4 to 5.5 v operating temperature range t opr ? 40 to 85 c parameter symbol condition rating unit frequency deviation ? f/f o ta = 25 c, v dd = 5.0v NR8576 a 5 ?12 ppm NR8576 b 5 ?23 ppm frequency temperature characteristic t op ta = ? 10 to 70 c, v dd = 5.0v, 25 c std +10/ ? 120 ppm frequency voltage characteristic f/v ta = 25 c, v dd = 2.0 to 5.5v ? max ppm/v oscillator start time t sta ta = 25 c, v dd = 2.5v 3 max sec aging f a ta = 25 c, v dd = 5.0v, ?st year ? max ppm/year
NR8576 series seiko npc corporatoin? dc electrical characteristics v ss = 0v, v dd = 5.0v 10%, ta = ? 40 to 85 c unless otherwise noted. parameter symbol condition rating unit min typ max current consumption i dd1 v dd = 5.0v ce = v ss , foe = v ss , fsel = v dd , fout: ?ating 1.5 3.0 ? i dd2 v dd = 3.0v 1.0 2.0 ? i dd3 v dd = 2.0v 0.5 1.0 ? i dd4 v dd = 5.0v ce = v ss , foe = v dd , fsel = v ss , fout: 32khz output 4.0 10.0 ? i dd5 v dd = 3.0v 2.5 6.5 ? i dd6 v dd = 2.0v 1.5 4.0 ? high-level input voltage v ih ce, fsel, wr, foe, clk, data 0.8v dd v low-level input voltage v il ce, fsel, wr, foe, clk, data 0.2v dd v input off leakage current i off ce, fsel, wr, foe, clk; v in = v dd or v ss 0.5 ? high-level output voltage v oh1 v dd = 5.0v i oh = ? 1.0ma; data, fout 4.5 v v oh2 v dd = 3.0v 2.0 v low-level output voltage v ol1 v dd = 5.0v i ol = 1.0ma; data, fout 0.5 v v ol2 v dd = 3.0v 0.8 v output load fanout n/cl fout 2 lsttl/30pf max output leakage current i ozh v out = 5.5v; data, fout ? 1.0 1.0 ? i ozl v out = 0v; data, fout ? 1.0 1.0 ? supply voltage detect threshold voltage v dt 1.4 1.7 2.0 v
NR8576 series seiko npc corporatoin? ac characteristics ta = ? 40 to 85 c, cl = 50pf unless otherwise noted. parameter symbol rating unit v dd = 5v 10% v dd = 3v 10% min max min max clk clock period t clk 0.75 7800 1.5 7800 ? clk low-level pulsewidth t clkl 0.375 3900 0.75 3900 ? clk high-level pulsewidth t clkh 0.375 3900 0.75 3900 ? ce setup time t ces 0.375 3900 0.75 3900 ? ce hold time t ceh 0.375 0.75 s ce enable time t ce 0.9 0.9 sec write data setup time t sd 0.1 0.2 s write data hold time t hd 0.1 0.1 s wr setup time t wrs 100 100 ns wr hold time t wrh 100 100 ns data output delay time t datd 0.2 0.4 ? data output ?ating time t dz 0.1 0.2 ? clock rise time t r1 50 100 ns clock fall time t f1 50 100 ns fout rise time (cl = 30pf) t r2 100 200 ns fout fall time (cl = 30pf) t f2 100 200 ns disable time (cl = 30pf) t hz 100 200 ns t lz 100 200 ns enable time (cl = 30pf) t zh 100 200 ns t zl 100 200 ns fout duty cycle (cl = 30pf) duty 40 60 40 60 % wait time t rcv 0.95 1.9 s
NR8576 series seiko npc corporatoin? timing diagrams data read data write wr ce clk data t ce t wrs t ces t clkh t clk t datd t clkl t f1 t r1 t dz t ceh t rcv t wrh wr ce clk data t ce t wrs t ces t clkh t clk t sd t clkl t f1 t r1 t ceh t rcv t wrh t hd
NR8576 series seiko npc corporatoin? fout disable/enable note that foe and fsel do not have chatter elimination circuits. consequently, switching either foe or fsel during 32khz mode operation may generate chatter noise on the fout output. also, note that the 1hz and 32khz oscillators are not synchronized to each other, so switching intervals shortens the duty cycle. accordingly, a wait time ( chattering time + output frequency period) should be incorporated when switching intervals. fout t r2 t h t t f2 10% 50% 90% duty = 100 (%) t t h foe t hz t zh 10% 50% 90% 50% fout foe t lz t zl 10% 50% 90% 50% fout
NR8576 series seiko npc corporatoin? functional description timer data con?uration counter data in bcd code format automatic long/short month and leap-year adjustment 24-hour time display lsb rst write and read data 1. * bit: optional write bits. 2. fdt bit: supply voltage detect bit the fdt bit is set to 1 when the voltage between vdd and vss falls below 1.7 0.3v. the fdt bit is reset to 0 for data reads longer than 48 bits. note that the fdt bit is not reset to 0 for data reads of 47 bits or less. the read/write data bits should be should be set to 0. after the supply voltage is applied, the fdt bit should be set to 0. 3. tm bit: factory test bit. should be set to 0 for normal use. fdt s40 s20 s10 s8 s1 s2 s4 ? mi40 mi20 mi10 mi8 mi1 mi2 mi4 h20 h10 h8 h1 h2 h4 ?? w1 w2 w4 ? d20 d10 d8 d1 d2 d4 ?? ? mo10 mo8 mo1 mo2 mo4 ? tm y80 y40 y20 y10 y8 y1 y2 y4 msb lsb second ( 0 to 59 ) minute ( 0 to 59 ) hour ( 0 to 23 ) week ( 1 to 7 ) day ( 1 to 31 ) month ( 1 to 12 ) year ( 0 to 99 ) vdd ce (read mode) v det fdt detected pulse 0.5 second 0.5 second
NR8576 series seiko npc corporatoin? data read data is output when wr is low and ce is high. time and calendar data is loaded into shift registers on the rst rising edge of the clock clk, and the seconds digit lsb is output on data. the data is then loaded and shifted in the sequence second, minute, hour, week, day, and month on the rising edge of clk, and output on data. the output data is valid after 52 rising edges of the clock; data input after 52 cycles does not alter the rst 52 bits of valid data. within the 52 cycles of valid data, data already input can be output if there is a falling edge of ce after the cor- responding number of cycles. for example, the data comprising the second-to-week is output is ce goes low after 28 clock cycles. for continuous data reads, a wait time (t rcv ) is required before the next data cycle if ce has gone low. note that if an update operation (a 1s carry) occurs during a data read, an error of ? 1s in the read data is gener- ated. the data read time should be completed after t ce 0.9s. wr ce clk data output mode s1 second year fdt s40 s20 s10 s8 s4 s2 y80 y40 y20 y10 y8 1 2 3 52 53 54 54+n non change output data
NR8576 series seiko npc corporatoin?0 data write data is input when wr is high and ce is high. the seconds digit signal to the timer counter stops on the rst falling edge of clk and the counter remains stopped until the next rising edge of ce. the 1hz to 128hz frequency divider step counters are reset during the interval between the rst and second rising edges of clk. the data is then input on data into the shift register, starting with seconds digit lsb synchronized with the rising edge of clk. after the nal data is input into the shift register following 52 cycles, the shift register contents are transferred to the timer counters. note that a data write must contain 52 bits of input data. if ce goes low before 52 bits are input, the input data is invalid. if the input data exceeds 52 bits, data from the 53rd bit is ignored (the rst 52 bits remain valid). the data write time should be completed after t ce 0.9s. if a data read occurs immediately after a data write, a wait time (t rcv ) is required if ce has gone low. note that writing null data will cause incorrect operation. all bits must be valid data bits. wr ce clk data input mode s1 second year fdt s40 s20 s10 s8 s4 s2 y80 y40 y20 y10 1 2 3 52 53 54 54+n y8
NR8576 series seiko npc corporatoin?1 nc9603de 2006.08 please pay your attention to the following points at time of using the products shown in this document. the products shown in this document (hereinafter ?roducts? are not intended to be used for the apparatus that exerts harmful in?ence on human lives due to the defects, failure or malfunction of the products. customers are requested to obtain prior written agreeme nt for such use from seiko npc corporation (hereinafter ?pc?. customers shall be solely responsible for, and indemnify and hold npc free and harmless from, any and all claims, damages, losses, expenses or lawsuits, due to such use without such agreement. npc reserves the right to change the speci?ations of the products in order to improve the characteristic or reliability thereof. npc makes no claim o r warranty that the contents described in this document dose not infringe any intellectual property right or other similar right owned by third parties. therefore, npc shall not be responsible for such problems, even if the use is in accordance with the descriptions provided in t his document. any descriptions including applications, circuits, and the parameters of the products in this document are for reference to use the products, and shall not be guaranteed free from defect, inapplicability to the design for the mass-production products without further te sting or modi?ation. customers are requested not to export or re-export, directly or indirectly, the products to any country or any ent ity not in compliance with or in violation of the national export administration laws, treaties, orders and regulations. customers are req uested appropriately take steps to obtain required permissions or approvals from appropriate government agencies. seiko npc corporation 15-6, nihombashi-kabutocho, chuo-ku, tokyo 103-0026, japan telephone: +81-3-6667-6601 facsimile: +81-3-6667-6611 http://www.npc.co.jp/ email: sales @ npc.co.jp

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